1. Field of the Invention
The present invention generally relates to a thermal head driving integrated circuit (IC). More specifically, the present invention is directed to a thermal head driving circuit capable of performing a multi-color printing operation by setting plural sets of energizing time with respect to respective heating resistive elements.
2. Description of the Related Art
While various sorts of office automation (OA) appliances such as personal computers (PCs) and word processors have been popularized, printers using thermal heads are widely utilized as printers for printing out documents and images formed by these OA appliances.
When a thermal head is employed so as to print, for example, on an A4-sized paper in a line sequential manner, the thermal head is provided with 1,728 heating resistive elements arranged along one column. Then, while the entire heating resistive elements are subdivided into plural element blocks for every 64 heating resistive elements, the heating resistive elements belonging to each of these sub-divided blocks are controlled by an ON/OFF control mode (namely energizing/energizing-stop control mode) by employing thermal head driving integrated circuits for every block.
FIG. 5 is a circuit diagram for indicating a drive unit which may control the ON/OFF state of one heating resistive element in such a thermal head driving integrated circuit.
As indicated in this drawing, a drive unit of a heating resistive element 100 is provided with a drive transistor 200 and a 2-input AND gate circuit 300. The output terminal of this AND gate circuit 300 is connected to the gate of the drive transistor 200, the driver output terminal DO1 of the AND gate circuit 300 is connected to the drain of this drive transistor 200, and also, all of the source terminals are connected to the ground potential. One terminal of this heating resistive element 100 for printing one dot is connected to the driver output terminal DO1.
To one input terminal of the AND gate circuit 300, a data signal DAT is supplied via a shift register (not shown) and a latch circuit (not shown either) with respect to each of the data bits, whereas a strobe signal STB commonly applied to the other AND gate circuits is supplied to the other input terminal of this AND gate circuit 300.
In accordance with such a drive unit, when either data DAT xe2x80x9c1xe2x80x9d (H level) or data DAT xe2x80x9c0xe2x80x9d (L level) produced based upon print data is supplied from the latch circuit to the AND gate circuit 300, the strobe signal STB is supplied at predetermined timing, so that the level of the signal becomes an H level. As a result, the level of the output signal from the AND gate circuit 300 to which the data DAT xe2x80x9c1xe2x80x9d has been supplied is brought into an H level, so that the drive transistor 200 is turned ON. While the strobe signal STB is supplied to this AND gate circuit 300, the heating resistive element 100 is energized to perform a printing operation.
On the other hand, in the case that the AND gate circuit 300 is turned ON/OFF in the drive unit shown in FIG. 5, if a voltage signal having a sharp rising edge, or a voltage signal having a sharp falling edge is applied to the gate of the drive transistor 200, then an overshoot, or an undershoot phenomenon appears in the drain voltage of this drive transistor 200. As a result, the drive transistor 200 must have such a maximum rating voltage capable of withstanding this overshoot of the drain voltage. Similarly, such an overshoot or an undershoot phenomenon appears even in a bipolar IC, or a single channel MOS. After all, in any cases, the drive transistor 200 must have a maximum rating voltage capable of withstanding the overshoot voltage.
Under such a circumstance, in the conventional AND gate circuit 300, the internal circuit thereof is constructed in such a manner that a channel length, also referred to as an L-length, of a circuit side to which the ON/OFF-controlling strobe signal STB is supplied is made long. Thus, since the rising operation of this AND gate circuit 300 is delayed, the overshoot voltage is suppressed.
On the other hand, another case may be conceived. That is, a printing operation of plural gradation levels may be carried out, or a printing operation of plural colors may be performed by employing a single heating resistive element 100 for printing out 1 dot. In other words, by employing an integer xe2x80x9cnxe2x80x9d different the energizing times for one heating resistive element 100 so that n different colors or gradations may be produced, color development density may be varied. Otherwise, when recording paper is used which may develop different colors in response to heating thermal energy amounts defined by energizing time, the multi-color printing operation is carried out.
FIG. 6 represents both a drive unit and the heating resistive element 100, in which such a 2-color printing thermal head driving IC is realized by using the conventional 1-color printing thermal head driving IC.
FIG. 6(a) shows a circuit in which two sets of AND gate circuits 300r and 300b are connected to the gate of the drive transistor 200 connected to a single heating resistive element 100. Similar to the AND gate circuit 300 indicated in FIG. 5, both the AND gate circuits 300r and 300b are arranged as follows: to suppress an overshoot phenomenon, L-lengths of sides to which strobe signals STBr and STBb are supplied are made long.
As explained above, although the output signals of both the AND gate circuits 300r and 300b are directly supplied to the gate of the drive transistor 200, since the rising edges of the strobe signals STBr and STBb are suppressed, the overshoot phenomenon can be suppressed.
FIG. 6(b) shows another circuit in which a 2-input OR gate circuit is connected to the gate of the drive transistor 200, and AND gate circuits 301r and 301b are connected to the respective input terminals of this 2-input OR gate circuit. In this case, L-lengths of the AND gate circuits 301r and 301b on both input sides are not made long, but normal AND gate circuits are used.
On the other hand, the OR gate circuit 310 connected to the gate of the drive transistor 200 is so arranged that L-lengths of both input sides thereof are made long. As a result, although both the signals outputted from the AND gate circuits 301r and 301b have sharp rising edges, the sharp rising edges are delayed by this OR gate circuit 310 in which the L-lengths of the input sides are made long. As a result, the transistor 200 is driven under such a condition that the overshoot phenomenon is suppressed.
In the drive unit having such a circuit arrangement, since the output time of the strobe signal STBr and the output time of the strobe signal STBb are separately set, the pulse width of the pulse signal applied to the gate of the drive transistor 200 may be adjusted. As a result, the time when the drive transistor 200 is turned ON, and also the heating time defined by the heating resistive element 100 is changed, so that the printing operations of the plural gradation and also the multi-color printing may be carried out.
For instance, when such a recording paper is used where a red color is developed by energizing the heating resistive element 100 for a short time period and also a black color is developed by energizing the heating resistive element 100 for a long time period, while the print data DATr for developing the red color is supplied, such a strobe signal STBr having a short pulse width is supplied. As a result, a red color contained in one line is printed out. On the other hand, while the print data DATb for developing the black color is supplied, such a strobe signal STBb having a long pulse width is supplied. As a consequence, a black color contained in the same one line is printed out.
On the other hand, when either an AND gate circuit or an OR gate circuit is provided, if this gate circuit is arranged in such a manner that an L-length is made long, then a circuit size of this gate circuit is increased. As a consequence, both the drive units shown in FIG. 6(a) and FIG. 6(b) require two sets of such structural portions whose L-lengths are made long. Therefore, there is a problem in that the entire size of this drive unit is increased. In particular, when an n-gradation control operation is carried out and an n-color printing operation is performed, L-lengths at each of the xe2x80x9cnxe2x80x9d portions must be made long, and furthermore, the circuit sizes must be considerably increased.
Also, since the delay time caused by the L-lengths at the two portions is different from each other, the switching speeds of the drive transistor 200 with respect to the same dot are made different as to the print data DATr and the print data DATb. As a consequence, as to the gradation control operation and the color control operation (PWM=controlled by pulse width), there is another problem that the gradation for every dot (bit) is made ununiform.
Accordingly, an object of the present invention is to provide a thermal head driving integrated circuit capable of suppressing an increase of a circuit size even when a plural-gradation printing operation and/or a multi-color printing operation are carried out by employing a single heating resistive element. Also, another object of the present invention is to provide such a thermal head driving integrated circuit capable of energizing such a single heating resistive element with the same delay time with respect to gradation and/or each of colors in the same bit.
To achieve the above-described object, a thermal head driving integrated circuit according to an aspect of the present invention is featured by comprising: a plurality of drive units each in correspondence with a respective one of the respective heating resistive elements, wherein each of the drive units is comprised of a drive transistor for controlling the energizing operation of the corresponding heating resistive element in response to the supplied print data; used for energizing the heating resistive elements for an integer number xe2x80x9cnxe2x80x9d of different durations to produce n different print types such as gradations or colors; a plurality of delay means, the plurality being less than xe2x80x9cnxe2x80x9d, for delaying the print data to supply the delayed print data to the drive transistor; xe2x80x9cnxe2x80x9d print data bit storing means for storing xe2x80x9cnxe2x80x9d bits of supplied print data with respect to each of the xe2x80x9cnxe2x80x9d print types; and xe2x80x9cnxe2x80x9d print data bit supplying means for supplying the print data saved in the corresponding print data storing means to the delay means.
As a consequence, since a total number of delay means is selected to be less than xe2x80x9cnxe2x80x9d, or preferably 1, the entire size of the integrated circuit can be reduced. Also, since a single delay element is commonly used as to plural sorts of print data, the printing qualities as to the commonly used print data can be made uniform.
Further, in the thermal head driving integrated circuit of the present invention, the drive transistor is an enhancement type FET, and the delay means is an 1-input/1-output logic circuit, the L-length of which is made long.